Exit EN0-001 ARM Accredited Engineer
Question 5 of 5
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Q5 Single choice

A 32KB 4-way set associative instruction cache supports a cache line size of 64 bytes.

How many bits are required to index a cache line in a way?

  • A

    6 bits

  • B

    7 bits

  • C

    9 bits

  • D

    15 bits

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